Principles of digital design
High-Speed Booth Encoded Parallel Multiplier Design
IEEE Transactions on Computers - Special issue on computer arithmetic
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Logic and Computer Design Fundamentals with Cdrom
Logic and Computer Design Fundamentals with Cdrom
A Fast and Well-Structured Multiplier
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Introduction to Logic Design with CD ROM
Introduction to Logic Design with CD ROM
| Hi-index | 0.00 |
This paper proposes an innovative algorithm to find the two's complement of a binary number. The proposed method works in logarithmic time (O(logN)) instead of the worst case linear time (O(N)) where a carry has to ripple all the way from LSB to MSB. The proposed method also allows for more regularly structured logic units which can be easily modularized and can be naturally extended to any word size. Our synthesis results show that our method achieves up to 2.8× of performance improvement and up to 7.27× of power savings compared to the conventional method.