A hardware accelerator for controlling access to multiple-unit resources in safety/time-critical systems

Authors:
Philippe Marchand;Purnendu Sinha
Affiliations:
Dept. of ECE, Concordia University, Montreal, Canada;Indian Institute of Information Technology, Bangalore, India
Venue:
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Year:
2005

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Abstract

In multitasking, priority-driven systems, resource access-control protocols such as Priority Ceiling Protocol (PCP) reduce the undesirable effects of resource contention. In general, software implementation of these protocols entails costly computations that can degrade the system performance to unacceptable levels. In this paper, we present the design for a hardware-accelerator to execute the PCP functionality for controlling access to multiple-unit resources and illustrate that the proposed implementation accelerates the execution time by a factor of up to 30.