Design of digital filters for low power applications using integer quadratic programming

Authors:
Mustafa Aktan;Günhan Dündar
Affiliations:
Department of Electrical & Electronics Engineering, Bogazici University, Bebek, Istanbul, Turkiye;Department of Electrical & Electronics Engineering, Bogazici University, Bebek, Istanbul, Turkiye
Venue:
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Year:
2005

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Abstract

An integer quadratic programming based formulation is proposed for the design of FIR filters implemented on Digital Signal Processors (DSP). The method unifies the cost of switching activity and number of ones in coefficients and is applicable to DSPs having multiple multiply accumulate units. Four FIR filter examples are designed with the proposed method. Power simulation results show that up to 38% power reduction can be achieved in the multiply accumulate unit of a DSP using the optimized coefficients. The resulting coefficients show better performance than coefficients optimized with previously proposed methods such as reordering coefficients.