Evolvable hardware system at extreme low temperatures

Authors:
Ricardo S. Zebulum;Adrian Stoica;Didier Keymeulen;Lukas Sekanina;Rajeshuni Ramesham;Xin Guo
Affiliations:
Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA;Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA;Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA;Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA;Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA;Jet Propulsion Laboratory/Caltech, NASA, Pasadena, CA
Venue:
ICES'05 Proceedings of the 6th international conference on Evolvable Systems: from Biology to Hardware
Year:
2005

Citing 1
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Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure

Genetic Programming and Evolvable Machines
Automated synthesis of multiple analog circuits using evolutionary computation for redundancy-based fault-tolerance

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Abstract

This paper describes circuit evolutionary experiments at extreme low temperatures, including the test of all system components at this extreme environment (EE). In addition to hardening-by-process and hardening-bydesign, “hardening-by-reconfiguration”, when applicable, could be used to mitigate drifts, degradation, or damage on electronic devices (chips) in EE, by using re-configurable devices and an adaptive self-reconfiguration of their circuit topology. Conventional circuit design exploits device characteristics within a certain temperature/radiation range; when that is exceeded, the circuit function degrades. On a reconfigurable device, although component parameters change in EE, a new circuit design, suitable for new parameter values, may be mapped into the reconfigurable structure to recover the initial circuit function. This paper demonstrates this technique for circuit evolution and recovery at liquid nitrogen temperatures (-196.6°C). In addition, preliminary tests are performed to assess the survivability of the evolutionary processor at extreme low temperatures.