Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure

  • Authors:

  • Kyung-Joong Kim;Adrian Wong;Hod Lipson

  • Affiliations:

  • Mechanical and Aerospace Engineering, Cornell University, Ithaca, USA 14853 and Department of Computer Engineering, Sejong University, Seoul, Republic of Korea 143-747;Electrical and Computer Engineering, Cornell University, Ithaca, USA 14853 and Sandia National Laboratories, Livermore, USA 94550;Computing and Information Science, Cornell University, Ithaca, USA 14853-7501

  • Venue:
  • Genetic Programming and Evolvable Machines
  • Year:
  • 2010

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Abstract

This study focuses on the use of genetic programming to automate the design of robust analog circuits. We define two complementary types of failure modes: partial short-circuit and partial disconnect, and demonstrated novel circuits that are resilient across a spectrum of fault levels. In particular, we focus on designs that are uniformly robust, and unlike designs based on redundancy, do not have any single point of failure. We also explore the complementary problem of designing tamper-proof circuits that are highly sensitive to any change or variation in their operating conditions. We find that the number of components remains similar both for robust and standard circuits, suggesting that the robustness does not necessarily come at significant increased circuit complexity. A number of fitness criteria, including surrogate models and co-evolution were used to accelerate the evolutionary process. A variety of circuit types were tested, and the practicality of the generated solutions was verified by physically constructing the circuits and testing their physical robustness.