Evolutionary design of fault-tolerant analog control for a piezoelectric pipe-crawling robot
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Analog circuit optimization system based on hybrid evolutionary algorithms
Integration, the VLSI Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Genetic Programming and Evolvable Machines
Combining multiple evolved analog circuits for robust evolvable hardware
IDEAL'09 Proceedings of the 10th international conference on Intelligent data engineering and automated learning
Research on fault-tolerance of analog circuits based on evolvable hardware
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Robust simultaneous feedback stabilisation of space robot attitude
International Journal of Computer Applications in Technology
International Journal of Computer Applications in Technology
A novel protection and control strategy for high-voltage power frequency control system
International Journal of Computer Applications in Technology
A circuit representation technique for automated circuit design
IEEE Transactions on Evolutionary Computation
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Analogue circuits play an important part in modern electronic systems. Existing works on evolutionary fault-tolerant design of analogue circuits are mainly based on the idea of introducing certain faults into the design process of analogue circuits. Via this idea, the fault-tolerant circuits may have outstanding ability of tolerance on the introduced-into-design-process faults. On the contrary, these circuits might be fragile under the impact of not-introduced-into-design-process faults. This paper proposes a novel method of fault-tolerant analogue circuit design method that is different from the existing works, which are based on the idea of introducing certain faults into the design process of analogue circuits. We do not introduce any faults into the design process of analogue circuits. As an alternative, we design a pair of analogue circuits, which are negatively correlated in the frequency responses. The experimental results show that the proposed method is a promising way of fault-tolerant analogue circuit design.