Compile-Time energy optimization for parallel applications in on-chip multiprocessors

Authors:
Juan Chen;Huizhan Yi;Xuejun Yang;Liang Qian
Affiliations:
School of Computer, National University of Defense Technology, Changsha, P.R.China;School of Computer, National University of Defense Technology, Changsha, P.R.China;School of Computer, National University of Defense Technology, Changsha, P.R.China;Interdisciplinary Research Centre in Materials, University of Birmingham, UK
Venue:
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part II
Year:
2006

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Abstract

Energy consumption is becoming one of the key optimization objects in on-chip multiprocessor. Minimizing the energy consumption without parallel performance loss is concerned. In this paper, we focus on a DVFS-enabled on-chip multiprocessor architecture, which allows dynamically adjusting each processor's voltage/frequency or shut down unused processors so to obtain energy savings. A detailed analytical model is provided and validated by experiments. Experimental results show energy saving can be up to 10.34% without performance loss.