Cache based power analysis attacks on AES

Authors:
Jacques Fournier;Michael Tunstall
Affiliations:
Computer Laboratory, University of Cambridge, Cambridge, UK;Smart Card Centre, Information Security Group, Royal Holloway, University of London, Egham, Surrey, UK
Venue:
ACISP'06 Proceedings of the 11th Australasian conference on Information Security and Privacy
Year:
2006

Citing 8
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Abstract

This paper describes possible attacks against software implementations of AES running on processors with cache mechanisms, particularly in the case of smart cards. These attacks are based on side-channel information gained by observing cache hits and misses in the current drawn by the smart card. Two different attacks are described. The first is a combination of ideas proposed in [2] and [11] to produce an attack that only requires the manipulation of the plain text and the observation of the current. The second is an attack based on specific implementations of the xtime function [10]. These attacks are shown to also work against algorithms using Boolean data masking techniques as a DPA countermeasure.