AES Power Attack Based on Induced Cache Miss and Countermeasure

  • Authors:
  • Guido Bertoni;Vittorio Zaccaria;Luca Breveglieri;Matteo Monchiero;Gianluca Palermo

  • Affiliations:
  • STMicroelectronics, Milano, Italy;STMicroelectronics, Milano, Italy;Politecnico di Milano, Italy;Politecnico di Milano, Italy;Politecnico di Milano, Italy

  • Venue:
  • ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume I - Volume 01
  • Year:
  • 2005

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Abstract

This paper presents a new attack against a software implementation of the Advanced Encryption Standard. The attack aims at flushing elements of the SBOX from the cache, thus inducing a cache miss during the encryption phase. The power trace is then used to detect when the cache miss occurs; if the miss happens in the first round of the AES then the information can be used to recover part of the secret key. The attack has been simulated using the Wattch simulation framework and a simple software implementation of AES (using a single table for the SBOX). The attack can be easily extended to more sophisticated versions of AES with more than one table. Eventually, we present a simple countermeasure which does not require randomization.