Are multiport memories physically feasible?

  • Authors:
  • Martti J. Forsell

  • Affiliations:
  • Department of Computer Science, University of Joensuu, PB 111, SF-80101 Joensuu, Finland,

  • Venue:
  • ACM SIGARCH Computer Architecture News
  • Year:
  • 1994

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Abstract

A Parallel Random Access Machine (PRAM) is a popular model of parallel computation that promises easy programmability and great parallel performance, but only if efficient shared main memories can be built. This would not be easy, because the complexity of shared memories leads to difficult technical problems. In this paper we consider the idea of true multiport memory that can be used as a building block for efficient PRAM-style shared main memory. Two possible structures for multiport memory chips are presented. We shall also give a preliminary cost-effectivity and performance analysis for memory systems using proposed multiport RAMs. Results are encouraging: At least small size multiport memories seem to be physically feasible.