Integration of message passing and shared memory in the Stanford FLASH multiprocessor

  • Authors:

  • John Heinlein;Kourosh Gharachorloo;Scott Dresser;Anoop Gupta

  • Affiliations:

  • Computer Systems Laboratory, Stanford University, Stanford, CA;DEC Western Research Laboratory, 250 University Ave., Pato Alto, CA;Hewlett-Packard, Workstation Systems Division, 300 Apollo Drive, Chelmsford, MA;Computer Systems Laboratory, Stanford University, Stanford, CA

  • Venue:
  • ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
  • Year:
  • 1994

Quantified Score

Hi-index 0.02

Visualization

Abstract

The advantages of using message passing over shared memory for certain types of communication and synchronization have provided an incentive to integrate both models within a single architecture. A key goal of the FLASH (FLexible Architecture for SHared memory) project at Stanford is to achieve this integration while maintaining a simple and efficient design. This paper presents the hardware and software mechanisms in FLASH to support various message passing protocols. We achieve low overhead message passing by delegating protocol functionality to the programmable node controllers in FLASH and by providing direct user-level access to this messaging subsystem. In contrast to most earlier work, we provide an integrated solution that handles the interaction of the messaging protocols with virtual memory, protected multiprogramming, and cache coherence. Detailed simulation studies indicate that this system can sustain message-transfers rates of several hundred megabytes per second, effectively utilizing projected network bandwidths for next generation multiprocessors.