A zero-overhead IC identification technique using clock sweeping and path delay analysis

  • Authors:
  • Nicholas Tuzzio;Kan Xiao;Xuehui Zhang;Mohammad Tehranipoor

  • Affiliations:
  • University of Connecticut, Storrs, CT, USA;University of Connecticut, Storrs, CT, USA;University of Connecticut, Storrs, CT, USA;University of Connecticut, Storrs, CT, USA

  • Venue:
  • Proceedings of the great lakes symposium on VLSI
  • Year:
  • 2012

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Abstract

The counterfeiting of integrated circuits (ICs) has become a major issue for the electronics industry. Counterfeit ICs that find their way into the supply chains of critical applications can have a major impact on the security and reliability of those systems. This paper presents a new method for uniquely identifying ICs through path delay analysis. There is no overhead in terms of area, timing, or power for this method, since it extracts the intrinsic path delay variation information of the IC. Simulation results from 90nm technology and experimental results from 90nm FPGAs demonstrate the effectiveness of our technique.