Computing
Communications of the ACM
A Code Mapping Scheme for Dataflow Software Pipelining
A Code Mapping Scheme for Dataflow Software Pipelining
CODACS Prototype: CHIARA Language and Its Compilers
ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
CODACS Prototype: A Platform-Processor for CHIARA Programs
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 13 - Volume 14
Thousand core chips: a technology perspective
Proceedings of the 44th annual Design Automation Conference
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The number of cores integrated onto a single die is expected to climb steadily in the foreseeable future. The main aim of Demand Data Driven Architecture System (D3AS) project is an attempt to provide a new programming model and architecture to allow efficient programming of highly parallel systems based on thousands of simple, thin cores. After a detailed description of the proposed prototype, some experimental results, obtained by a demonstrator, are discussed. Results show that the D3AS approach is feasible and promising.