On Minimizing the Lengths of Checking Sequences
IEEE Transactions on Computers
Reduced Length Checking Sequences
IEEE Transactions on Computers
Correction to: Reduced Length Checking Sequences
IEEE Transactions on Computers
Exploring alternatives for transition verification
Journal of Systems and Software
Using distinguishing and UIO sequences together in a checking sequence
TestCom'06 Proceedings of the 18th IFIP TC6/WG6.1 international conference on Testing of Communicating Systems
Reducing the lengths of checking sequences by overlapping
TestCom'06 Proceedings of the 18th IFIP TC6/WG6.1 international conference on Testing of Communicating Systems
Generalizing redundancy elimination in checking sequences
ISCIS'05 Proceedings of the 20th international conference on Computer and Information Sciences
Eliminating redundant tests in a checking sequence
TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems
New state-recognition patterns for conformance testing of finite state machine implementations
Computer Standards & Interfaces
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Duan and Chen (doi:10.1016/j.jss.2009.05.019) proposed two methods for constructing an input/output sequence (IOS) whose execution on an implementation N of a given deterministic finite state machine (DFSM) M tests that N can be interpreted as a DFSM properly implementing every individual state and transition of M. This paper shows that the methods and three earlier similar methods potentially introduce cyclic dependencies between the essential segments of the produced IOS, meaning that the IOS might fail to be a complete test under the default interpretation. It then proposes modifications provably preventing such cycles. All the methods assume that M is completely specified and strongly connected and possesses a distinguishing set and that N has at most as many states as M.