Concurrency control and recovery in database systems
Concurrency control and recovery in database systems
A protocol test generation procedure
Computer Networks and ISDN Systems
A new approach to the maximum-flow problem
Journal of the ACM (JACM)
On the generation of minimal-length conformance tests for communication protocols
IEEE/ACM Transactions on Networking (TON)
Conformance testing with labelled transition systems: implementation relations and test generation
Computer Networks and ISDN Systems - Special issue on protocol testing
On Minimizing the Lengths of Checking Sequences
IEEE Transactions on Computers
Reduced Length Checking Sequences
IEEE Transactions on Computers
IEEE Transactions on Software Engineering
A survey of communication protocol testing
Journal of Systems and Software
Notes on Data Base Operating Systems
Operating Systems, An Advanced Course
Optimizing the Length of Checking Sequences
IEEE Transactions on Computers
A Method for the Design of Fault Detection Experiments
IEEE Transactions on Computers
Testing Software Design Modeled by Finite-State Machines
IEEE Transactions on Software Engineering
QSIC '07 Proceedings of the Seventh International Conference on Quality Software
Fault detecting experiments for sequential circuits
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
Reducing the lengths of checking sequences by overlapping
TestCom'06 Proceedings of the 18th IFIP TC6/WG6.1 international conference on Testing of Communicating Systems
Generalizing redundancy elimination in checking sequences
ISCIS'05 Proceedings of the 20th international conference on Computer and Information Sciences
Eliminating redundant tests in a checking sequence
TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems
New state-recognition patterns for conformance testing of finite state machine implementations
Computer Standards & Interfaces
On "Exploring alternatives for transition verification"
Journal of Systems and Software
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When an implementation under test (IUT) is state-based, and its expected abstract behavior is given in terms of a finite state machine (FSM), a checking sequence generated from a specification FSM and applied to an IUT for testing can provide us with high-level confidence in the correct functional behavior of our implementation. One of the issues here is to generate efficient checking sequences in terms of their lengths. As a major characteristics, a checking sequence must contain all @b-sequences for transition verification. In this paper, we discuss the possibility of reducing the lengths of checking sequences by making use of the invertible transitions in the specification FSM to increase the choice of @b-sequences to be considered for checking sequence generation. We present a sufficient condition for adopting alternative @b-sequences and illustrate typical ways of incorporating these alternative @b-sequences into existing methods for checking sequence generation to reduce the lengths. Compared to the direct use of three existing methods, our experiments show that most of the time the saving gained by adopting alternative @b-sequences falls in the range of 10-40%.