Statecharts: A visual formalism for complex systems
Science of Computer Programming
An introduction to Estelle: a specification language for distributed systems
Computer Networks and ISDN Systems - Special Issue: Protocol Specification and Testing
Formal Methods for Protocol Testing: A Detailed Study
IEEE Transactions on Software Engineering
The CCITT-specification and description language SDL
Computer Networks and ISDN Systems
Testing finite state machines: fault detection
Selected papers of the 23rd annual ACM symposium on Theory of computing
On Minimizing the Lengths of Checking Sequences
IEEE Transactions on Computers
Test Generation for Multiple State-Table Faults in Finite-State Machines
IEEE Transactions on Computers
Testing Finite-State Machines: State Identification and Verification
IEEE Transactions on Computers
Testing conformance of a deterministic implementation against a non-deterministic stream X-machine
Theoretical Computer Science
Testing from Partial Deterministic FSM Specifications
IEEE Transactions on Computers
Separating sequence overlap for automated test sequence generation
Automated Software Engineering
Optimizing the Length of Checking Sequences
IEEE Transactions on Computers
Using adaptive distinguishing sequences in checking sequence constructions
Proceedings of the 2008 ACM symposium on Applied computing
Generating Checking Sequences for Partial Reduced Finite State Machines
TestCom '08 / FATES '08 Proceedings of the 20th IFIP TC 6/WG 6.1 international conference on Testing of Software and Communicating Systems: 8th International Workshop
Overcoming controllability problems with fewest channels between testers
Computer Networks: The International Journal of Computer and Telecommunications Networking
Exploring alternatives for transition verification
Journal of Systems and Software
Mutation testing from probabilistic and stochastic finite state machines
Journal of Systems and Software
Estimating the feasibility of transition paths in extended finite state machines
Automated Software Engineering
ZB'03 Proceedings of the 3rd international conference on Formal specification and development in Z and B
Reducing test sequence length using invertible sequences
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Testing from X-machine specifications
Formal methods and testing
Generating a checking sequence with a minimum number of reset transitions
Automated Software Engineering
Checking experiments for stream X-machines
Theoretical Computer Science
Using distinguishing and UIO sequences together in a checking sequence
TestCom'06 Proceedings of the 18th IFIP TC6/WG6.1 international conference on Testing of Communicating Systems
Reducing the lengths of checking sequences by overlapping
TestCom'06 Proceedings of the 18th IFIP TC6/WG6.1 international conference on Testing of Communicating Systems
Generalizing redundancy elimination in checking sequences
ISCIS'05 Proceedings of the 20th international conference on Computer and Information Sciences
Conditions for avoiding controllability problems in distributed testing
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
Minimizing coordination channels in distributed testing
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Eliminating redundant tests in a checking sequence
TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems
New state-recognition patterns for conformance testing of finite state machine implementations
Computer Standards & Interfaces
On "Exploring alternatives for transition verification"
Journal of Systems and Software
Computers in Biology and Medicine
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Here, the method proposed in [13] for constructing minimal-length checking sequences based on distinguishing sequences is improved. The improvement is based on optimizations of the state recognition sequences and their use in constructing test segments. It is shown that the proposed improvement further reduces the length of checking sequences produced from minimal, completely specified, and deterministic finite state machines.