Test Selection Based on Finite State Models
IEEE Transactions on Software Engineering
On Minimizing the Lengths of Checking Sequences
IEEE Transactions on Computers
Testing object-oriented systems: models, patterns, and tools
Testing object-oriented systems: models, patterns, and tools
Modeling Reactive Systems with Statecharts: The Statemate Approach
Modeling Reactive Systems with Statecharts: The Statemate Approach
Testing Enbredded Software
Reduced Length Checking Sequences
IEEE Transactions on Computers
IEEE Transactions on Software Engineering
Conformance Testing of Protocol Machines without Reset
Proceedings of the IFIP TC6/WG6.1 Thirteenth International Symposium on Protocol Specification, Testing and Verification XIII
Automating the Generation and Sequencing of Test Cases from Model-Based Specifications
FME '93 Proceedings of the First International Symposium of Formal Methods Europe on Industrial-Strength Formal Methods
A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models
IEEE Transactions on Computers
Using a minimal number of resets when testing from a finite state machine
Information Processing Letters
Optimizing the Length of Checking Sequences
IEEE Transactions on Computers
A Method for the Design of Fault Detection Experiments
IEEE Transactions on Computers
Testing Software Design Modeled by Finite-State Machines
IEEE Transactions on Software Engineering
Fault detecting experiments for sequential circuits
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
Using a model-based test generator to test for standard conformance
IBM Systems Journal
Improving test coverage for UML state machines using transition instrumentation
SAFECOMP'07 Proceedings of the 26th international conference on Computer Safety, Reliability, and Security
Evaluating test suite characteristics, cost, and effectiveness of FSM-based testing methods
Information and Software Technology
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Given a finite state machine M, a checking sequence is an input sequence that is guaranteed to lead to a failure if the implementation under test is faulty and has no more states than M. There has been much interest in the automated generation of a short checking sequence from a finite state machine. However, such sequences can contain reset transitions whose use can adversely affect both the cost of applying the checking sequence and the effectiveness of the checking sequence. Thus, we sometimes want a checking sequence with a minimum number of reset transitions rather than a shortest checking sequence. This paper describes a new algorithm for generating a checking sequence, based on a distinguishing sequence, that minimises the number of reset transitions used.