Research: ASET: A simulator toolkit for performance evaluation of ATM switches

  • Authors:
  • N. N. Raju;Ravi Mittal

  • Affiliations:
  • Department of Computer Science and Engineering, Indian Institute of Technology, Madras 600 036, India;Department of Computer Science and Engineering, Indian Institute of Technology, Madras 600 036, India

  • Venue:
  • Computer Communications
  • Year:
  • 1997

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Abstract

Asynchronous Transfer Mode (ATM) has emerged as a leading technique for high speed networks. The ATM is versatile and flexible enough to provide a service capable of integrating a wide spectrum of multimedia traffic. These multimedia traffic sources include compressed data, variable bit rate video and voice. ATM networks are designed to take into consideration all such heterogeneous traffic, and traffic with yet unknown service requirements. An ATM network consists of end hosts and switches communicating via a set of simple protocols. The main bottlenecks in today's high speed networks are the switching systems. This is opposed to the scenario in the mid 80's when the transmission channels were the main bottleneck in the network performance. There are numerous switch architectures proposed for ATM networks. Performance of these ATM switches is critical for efficient operation of the network. We here simulate different switch architectures. To this effect, we have developed an ATM switch simulator which will aid in comparing alternate designs. In this paper, we look at salient design features and some implementation issues in our simulator. The simulator takes into account different parameters such as input traffic pattern, topology of the switches, location/capacity of queues, scheduling schemes, and priority schemes. The simulator produces a set of performance metrics at the end of the simulation run.