Cell scheduling for ATM switch with delay-sensitive and loss-sensitive traffic

  • Authors:
  • Derek C. W. Pao;S. P. Lam

  • Affiliations:
  • Department of Electronic Engineering, City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong;Department of Electronic Engineering, City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong

  • Venue:
  • Computer Communications
  • Year:
  • 1998

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Abstract

The flexibility of asynchronous transfer mode (ATM) allows it to support various types of applications with diversified quality of service requirements. We broadly classified these services into the delay-sensitive (DS) class and the loss-sensitive (LS) class. The scheduling problem for two priority classes is much more complex than the single priority class counterpart. The scheduling algorithm is required to satisfy two conflicting requirements: (i) maintaining the cell delay of DS traffic within an acceptable range by giving it a higher transmission priority; (ii) minimizing the cell loss probability of LS traffic. In this paper, we present a distributed reservation-based scheduling algorithm that can effectively handle the requirements of both the DS and LS classes at the same time. The performance of the proposed method is compared with two other scheduling approaches via simulation.