Strength reduction of multiplications by integer constants

  • Authors:
  • Youfeng Wu

  • Affiliations:
  • Sequent Computer Systems, Inc., D2-798, 15450 S.W. Koll Parkway, Beaverton, OR

  • Venue:
  • ACM SIGPLAN Notices
  • Year:
  • 1995

Quantified Score

Hi-index 0.00

Visualization

Abstract

Replacing a multiplication of an integer constant by a sequence of simple instructions can be beneficial because it reduces the total number of cycles and also provides more opportunity for instruction level parallelism. In this paper we developed an algorithm that selectively replaces multiplications of integer constants with sequences of SUB, ADD, SHIFT, and LEA instructions. The algorithm runs fast and the generated instruction sequences are of high quality. The number of simple instructions generated for a multiplication of an integer constant is about 84.5% of the number of 1-bits in the binary representation of the constant. Also, for several popular processors, the simple instruction sequences significantly reduces the execution time to perform the multiplications.