Design and test of fixed-point multimedia co-processor for mobile applications
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
A low-power multimedia SoC with fully programmable 3D graphics for mobile devices
IEEE Computer Graphics and Applications - Special issue on creating musical-fountain shows virtual reality for the Digital Olympic Museum
Adaptive Partitioning of Vertex Shader for Low Power High Performance Geometry Engine
ISVC '09 Proceedings of the 5th International Symposium on Advances in Visual Computing: Part I
A 152-mW mobile multimedia SoC with fully programmable 3-D graphics and MPEG4/H.264/JPEG
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the Conference on Design, Automation and Test in Europe
Design of a high precision logarithmic converter in a binary floating point divider
Concurrency and Computation: Practice & Experience
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A full 3D graphics pipeline is investigated, and optimizations of graphics architecture are assessed for satisfying the performance requirements and overcoming the limited system resources found in mobile terminals. Two mobile 3D graphics processor architectures, RAMP and DigiAcc, are proposed based on the analysis, and a prototype development platform (REMY) is implemented. REMY includes a software graphics library and simulation environment developed for more flexible realization of mobile 3D graphics. The experimental results demonstrate the feasibility of mobile 3D graphics with 3.6 Mpolygons/s at 155 mW power consumption for full 3D operation.