High-performance polygon rendering
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
Efficient partitioning of fragment shaders for multipass rendering on programmable graphics hardware
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
The Geometry Engine: A VLSI Geometry System for Graphics
SIGGRAPH '82 Proceedings of the 9th annual conference on Computer graphics and interactive techniques
3D graphics LSI core for mobile phone "Z3D"
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Optimal automatic multi-pass shader partitioning by dynamic programming
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Geometry engine optimization: cache friendly compressed representation of geometry
Proceedings of the 2007 symposium on Interactive 3D graphics and games
Fast triangle reordering for vertex locality and reduced overdraw
ACM SIGGRAPH 2007 papers
A single (unified) shader GPU microarchitecture for embedded systems
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
Low-power 3D graphics processors for mobile terminals
IEEE Communications Magazine
Energy-aware code motion for GPU shader processors
ACM Transactions on Embedded Computing Systems (TECS)
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Advances in Computer Graphics have led to the creation of sophisticated scenes with realistic characters and fascinating effects. As a consequence the amount of geometry per frame is escalating, making the performance of geometry engine one of the major factors affecting the overall performance of a graphics application. In this paper we present a mechanism to speed-up geometry processing and at the same time reduce the power consumption by reducing the amount of computation on processing the geometry of a scene. Based on the observation that large number of triangles are trivially rejected in each frame, we propose to partition the vertex shader into position-variant and position-invariant parts and execute the position-invariant part of the shader only on those triangles that pass the trivial reject test. Our main contributions in this work are: (i) a partitioning algorithm that minimizes the duplication of code between the two partitions of the shader and (ii) an adaptive mechanism to enable the vertex shader partitioning so as to minimize the overhead incurred due to thread-setup of the second stage of the shader. By employing the proposed shader partitioning approach, we have achieved a saving of up to 50% of vertex shader instructions on games like Unreal Tournament 2004 and Chronicles of Riddick. Depending on the architecture implementing the pipeline, we expect that this huge saving on instructions would translate to significant saving of cycles and power of the geometry engine. Our experiments on ATTILA, a cycle level simulator for modern graphics pipelines, show a promising speed-up of up to 15% on geometry processing for various games.