SIGGRAPH '95 Proceedings of the 22nd annual conference on Computer graphics and interactive techniques
InfiniteReality: a real-time graphics system
Proceedings of the 24th annual conference on Computer graphics and interactive techniques
Polygon rendering on a stream architecture
HWWS '00 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
I3D '01 Proceedings of the 2001 symposium on Interactive 3D graphics
A user-programmable vertex engine
Proceedings of the 28th annual conference on Computer graphics and interactive techniques
ARM System-on-Chip Architecture
ARM System-on-Chip Architecture
Mobile Processors Begin to Grow Up
Computer
3D graphics LSI core for mobile phone "Z3D"
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Graphics for the masses: a hardware rasterization architecture for mobile phones
ACM SIGGRAPH 2003 Papers
Rendering of X3D content on mobile devices with OpenGL ES
Proceedings of the eleventh international conference on 3D web technology
A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains
Proceedings of the 22nd ACM SIGGRAPH/EUROGRAPHICS symposium on Graphics hardware
Adaptive Partitioning of Vertex Shader for Low Power High Performance Geometry Engine
ISVC '09 Proceedings of the 5th International Symposium on Advances in Visual Computing: Part I
Technical Section: Energy-aware hybrid precision selection framework for mobile GPUs
Computers and Graphics
Program-based dynamic precision selection framework with a dual-mode unified shader for mobile GPUs
Computers and Electrical Engineering
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The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for graphics processing. Instead of using the dedicated hardware engine with complex functions, we propose an efficient hardware architecture of low power vertex shader with programmability. Our architecture includes the following three features: I) a fixed-point SIMD datapath to exploit parallelism in vertex processing while keeping the power consumption low, II) a multithreaded coprocessor interface to decrease unwanted stalls between the main processor and the vertex shader, reducing power consumption by instruction-level power management, III) a programmable vertex engine to increases the datapath throughput by concurrent operations with main processor. Simulation results show that full 3D geometry pipeline can be performed at 7.2M vertices/sec with 115mW power consumption for polygons using the OpenGL lighting model. The improvement is about 10 times greater than that of the latest graphics core with floating-point datapath for wireless applications in terms of processing speed normalized by power consumption, Kvertices/sec per milliwatt.