A survey of Boolean matching techniques for library binding
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low power FPGA design—a re-engineering approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
Efficient computation of canonical form for Boolean matching in large libraries
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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Boolean matching is to check the equivalence of two functions under input permutation and input/output phase assignment. A straightforward implementation takes time complexity O(n!2n2), where n is the number of variables. Various signatures of variables were used to prune impossible permutations by many researchers. In this paper, based on communication complexity, we also propose two signatures, cofactor and equivalence signatures, which are general forms of many existing signatures. These signatures are used to develop an efficient Boolean matching algorithm which is based on checking structural equivalence of OBDD's. Experimental results on a set of benchmarks show that our algorithm is indeed very effective in solving Boolean matching problem