Fault Simulation Model for i{DDT} Testing: An Investigation
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Effects of on-chip inductance on power distribution grid
Proceedings of the 2005 international symposium on Physical design
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
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The soaring clocking frequency and integration density demand robust and stable power delivery to support tens of millions of transistors switching. To ensure the design quality of power delivery, extensive transient power grid simulations need to be performed during the design process. However, the traditional circuit simulation engines are not scaled well for the complexity of power delivery. As a result, it often takes a long runtime and huge memory requirement to simulate a medium-sized power grid circuit. In this paper, the authors develop and present a new efficient transient simulation algorithm for power distribution. The proposed. algorithm, transmission-line-modeling alternating-direction-implicit (TLM-ADI), first models the power delivery structure as transmission line mesh structure, then solves the transient modified nodal analysis matrices by the alternating-direction-implicit method. The proposed algorithm, with linear runtime and memory requirement, is also unconditionally stable which ensures that the time-step is not limited by any stability requirement. Extensive experimental, results show that the proposed algorithm is not only orders of magnitude faster than SPICE but also extremely memory saving and accurate.