Accelerating Assertion Coverage With Adaptive Testbenches

Authors:
B. Pal;A. Banerjee;A. Sinha;P. Dasgupta
Affiliations:
Indian Inst. of Technol., Kharagpur;-;-;-
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2008

Citing 0
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MYGEN: automata-based on-line test generator for assertion-based verification

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Test compaction techniques for assertion-based test generation

ACM Transactions on Design Automation of Electronic Systems (TODAES)

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Abstract

We present a new approach to bias random test generation for accelerating assertion coverage. The novelty of the proposed approach is that it treats the design under test as a black box and attempts to steer the simulation toward coverage points that are relevant for targeted assertions purely through external control. We present this approach over three different models with varying degrees of observability and control. The results demonstrate a significant speedup in assertion coverage as compared to randomized simulation.