A scalable wide-issue clustered VLIW with a reconfigurable interconnect
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing
Journal of VLSI Signal Processing Systems
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Modified predictive line search for block motion estimation on multimedia processors
Signal Processing - Fractional calculus applications in signals and systems
Configurable data memory for multimedia processing
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
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Today's multimedia services, both at the server/headend and the client/consumer end, require high computational performance to support video encoding, decoding, and transcoding. Traditionally, the processing requirements have been met by application-specific processors (ASIC). What once were standalone single-function devices are now network-connected, multifunction service platforms - the Internet-ready digital television/video recorder/teleconference/game platform, for example. As a result, these platforms now must support multiple image formats, compression standards, and processing algorithms. Equator Technologies has developed a high-performance, programmable system on a chip, the MAP-CA digital signal processor (DSP), to address this requirement. The MAP-CA DSP combines general-purpose reduced instruction set computer processing with high-performance image and signal processing in a very long instruction word framework. The chip is designed to replace hardwired ASIC in a variety of products, including digital head-end, networking products, and consumer applications. We present an analysis of the MAP-CA DSP architecture and provide several performance benchmarks with popular media processing applications.