A Flexible and Efficient Hardware Architecture for Real-Time Face Recognition Based on Eigenface
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels
Integration, the VLSI Journal
Remote augmented reality for multiple players over network
Proceedings of the international conference on Advances in computer entertainment technology
A VLSI implementation of barrel distortion correction for wide-angle camera images
IEEE Transactions on Circuits and Systems II: Express Briefs
Ensemble for high recognition performance FPGA
SMC'09 Proceedings of the 2009 IEEE international conference on Systems, Man and Cybernetics
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An efficient pipelined architecture for the real-time correction of barrel distortion in wide-angle camera images is presented in this paper. The distortion correction model is based on least-squares estimation to correct the nonlinear distortion in images. The model parameters include the expanded/corrected image size, the back-mapping coefficients, distortion center, and corrected center. The coordinate rotation digital computer (CORDIC) based hardware design is suitable for an input image size of 1028×1028 pixels and is pipelined to operate at a clock frequency of 40 MHz. The VLSI system will facilitate the use of a dedicated hardware that could be mounted along with the camera unit.