Assembling 2-D Blocks Into 3-D Chips

Authors:
Johann Knechtel;Igor L. Markov;Jens Lienig
Affiliations:
Institute of Electromechanical and Electronic Design, Dresden University of Technology, Dresden, Germany;Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA;Institute of Electromechanical and Electronic Design, Dresden University of Technology, Dresden, Germany
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2012

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Abstract

Despite numerous advantages of 3-D integrated circuits (ICs), their commercial success remains limited. In part, this is due to the wide availability of trustworthy intellectual property (IP) blocks developed for 2-D ICs and proven through repeated use. Block-based design reuse is imperative for heterogeneous 3-D ICs where memory, logic, analog, and microelectromechanical systems dies are manufactured at different technology nodes and circuit modules cannot be partitioned among several dies. In this paper, we show how to integrate 2-D IP blocks into 3-D chips without altering their layout. Experiments indicate that the overhead of proposed integration is small, which can help accelerate industry adoption of 3-D integration.