An Efficient Fast Mode Decision Algorithm Based on Motion Cost for H.264 Inter Prediction
IITAW '08 Proceedings of the 2008 International Symposium on Intelligent Information Technology Application Workshops
An improved SATD-based intra mode decision algorithm for H.264/AVC
ICASSP '09 Proceedings of the 2009 IEEE International Conference on Acoustics, Speech and Signal Processing
A 140-MHz 94 K gates HD1080p 30-frames/s intra-only profile H.264 encoder
IEEE Transactions on Circuits and Systems for Video Technology
Algorithm and hardware design of a fast intra-frame mode decision module for h.264/AVC encoders
Proceedings of the 24th symposium on Integrated circuits and systems design
Fast Inter Mode Decision Using Spatial Property of Motion Field
IEEE Transactions on Multimedia
Overview of the H.264/AVC video coding standard
IEEE Transactions on Circuits and Systems for Video Technology
Rate-constrained coder control and comparison of video coding standards
IEEE Transactions on Circuits and Systems for Video Technology
Fast intermode decision in H.264/AVC video coding
IEEE Transactions on Circuits and Systems for Video Technology
A Fast Mode Decision Algorithm and Its VLSI Design for H.264/AVC Intra-Prediction
IEEE Transactions on Circuits and Systems for Video Technology
Fast Inter-Mode Selection in the H.264/AVC Standard Using a Hierarchical Decision Process
IEEE Transactions on Circuits and Systems for Video Technology
SATD-Based Intra Mode Decision for H.264/AVC Video Coding
IEEE Transactions on Circuits and Systems for Video Technology
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In H.264/AVC, the encoding process can occur according to one of the 13 intraframe coding modes or according to one of the 8 available interframes block sizes, besides the SKIP mode. In the Joint Model reference software, the choice of the best mode is performed through exhaustive executions of the entire encoding process, which significantly increases the encoder's computational complexity and sometimes even forbids its use in real-time applications. Considering this context, this work proposes a set of heuristic algorithms targeting hardware architectures that lead to earlier selection of one encoding mode. The amount of repetitions of the encoding process is reduced by 47 times, at the cost of a relatively small cost in compression performance. When compared to other works, the fast hierarchical mode decision results are expressively more satisfactory in terms of computational complexity reduction, quality, and bit rate. The low-complexity mode decision architecture proposed is thus a very good option for real-time coding of high-resolution videos. The solution is especially interesting for embedded and mobile applications with support to multimedia systems, since it yields good compression rates and image quality with a very high reduction in the encoder complexity.