Computer Architecture: Complexity and Correctness
Computer Architecture: Complexity and Correctness
Model Checking of Safety Properties
Formal Methods in System Design
On the Synthesis of an Asynchronous Reactive Module
ICALP '89 Proceedings of the 16th International Colloquium on Automata, Languages and Programming
Small Progress Measures for Solving Parity Games
STACS '00 Proceedings of the 17th Annual Symposium on Theoretical Aspects of Computer Science
Memoryless determinacy of parity games
Automata logics, and infinite games
Checking Finite Traces Using Alternating Automata
Formal Methods in System Design
Experiments with deterministic ω-automata for formulas of linear temporal logic
Theoretical Computer Science - Implementation and application of automata
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Monitor Circuits for LTL with Bounded and Unbounded Future
Runtime Verification
Monitoring Interfaces for Faults
Electronic Notes in Theoretical Computer Science (ENTCS)
Runtime Verification for LTL and TLTL
ACM Transactions on Software Engineering and Methodology (TOSEM)
Efficient monitoring of ω-languages
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Minimising deterministic Büchi automata precisely using SAT solving
SAT'10 Proceedings of the 13th international conference on Theory and Applications of Satisfiability Testing
Short witnesses and accepting lassos in ω-automata
LATA'10 Proceedings of the 4th international conference on Language and Automata Theory and Applications
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We present a new multi-valued monitoring approach for linear-time temporal logic that classifies trace prefixes not only according to the existence of correct and erroneous continuations, but also according to the strategic power of the system and its environment to avoid or enforce a violation of the specification. We classify the monitoring status into four levels: (1) the worst case is a violation , where no continuation satisfies the specification any more; (2) unrealizable means that the environment can force the system to violate the specification; (3) realizable means that the system can enforce that the specification is satisfied; (4) the best case, fulfilled , indicates that all possible continuations satisfy the specification. Because our approach recognizes situations where the system cannot avoid a violation even though there may still be continuations in which the specification is satisfied, our approach detects errors earlier, and it detects errors that are missed by less detailed classifications. We give an asymptotically optimal construction of multi-valued monitoring automata based on parity games.