Checking safety properties using compositional reachability analysis
ACM Transactions on Software Engineering and Methodology (TOSEM)
Concurrency: state models & Java programs
Concurrency: state models & Java programs
Model checking
ACM Computing Surveys (CSUR)
Meeting Deadlines in Hard Real-Time Systems
Meeting Deadlines in Hard Real-Time Systems
Priority Inheritance Protocols: An Approach to Real-Time Synchronization
IEEE Transactions on Computers
An Architectural Style for Object Oriented Real-Time Systems
ICSR '98 Proceedings of the 5th International Conference on Software Reuse
Cheddar: a flexible real time scheduling framework
Proceedings of the 2004 annual ACM SIGAda international conference on Ada: The engineering of correct and reliable software for real-time & distributed systems using Ada and related technologies
Simulation based deadlock analysis for system level designs
Proceedings of the 42nd annual Design Automation Conference
Modelling and Evaluating Real-Time Software Architectures
Ada-Europe '09 Proceedings of the 14th Ada-Europe International Conference on Reliable Software Technologies
D-Finder: A Tool for Compositional Deadlock Detection and Verification
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Data races are evil with no exceptions: technical perspective
Communications of the ACM
Detection of deadlock potentials in multithreaded programs
IBM Journal of Research and Development
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Software architectural evaluation is a key discipline used to identify, at early stages of a real-time system (RTS) development, the problems that may arise during its operation. Typical mechanisms supporting concurrency, such as semaphores, mutexes or monitors, usually lead to concurrency problems in execution time that are difficult to be identified, reproduced and solved. For this reason, it is crucial to understand the root causes of these problems and to provide support to identify and mitigate them at early stages of the system lifecycle. This paper aims to present the results of a research work oriented to the development of the tool called ‘Deadlock Risk Evaluation of Architectural Models’ (DREAM) to assess deadlock risk in architectural models of an RTS. A particular architectural style, Pipelines of Processes in Object-Oriented Architectures–UML (PPOOA) was used to represent platform-independent models of an RTS architecture supported by the PPOOA –Visio tool. We validated the technique presented here by using several case studies related to RTS development and comparing our results with those from other deadlock detection approaches, supported by different tools. Here we present two of these case studies, one related to avionics and the other to planetary exploration robotics. Copyright © 2011 John Wiley & Sons, Ltd.