Software energy optimization through fine-grained function-level voltage and frequency scaling

  • Authors:
  • Carlo Brandolese;William Fornaciari

  • Affiliations:
  • Politecnico di Milano, MILANO, Italy;Politecnico di Milano, Milano, Italy

  • Venue:
  • Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
  • Year:
  • 2012

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Abstract

This paper presents a methodology and a toolchain to perform estimation and optimization of the energy consumption associated to software execution on tiny embedded systems. The estimation phase is based on an ISA-level characterization of the target processor, while the optimization phase is made combining the estimation process with design space exploration in order to exploit fine-grained dynamic voltage and frequency scaling. The proposed approach operates at compile-time, with the granularity of single C functions and almost automatically augments the source code.