Fundamentals of interactive computer graphics
Fundamentals of interactive computer graphics
Computer architecture and organization; (2nd ed.)
Computer architecture and organization; (2nd ed.)
Subanosecond pixel rendering with million transistor chips
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
Area-Efficient VLSI Computation
Area-Efficient VLSI Computation
Continuous Shading of Curved Surfaces
IEEE Transactions on Computers
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Polygon Streams is a distributed system with multiple processors and strictly local communication. A unique custom VLSI chip that constitutes an independent processing module forms a stage of the PS pipeline. The number of these modules in PS is a variable that is determined by the application. PS features a modular architecture, multi-ported on-chip memory, bit-serial arithmetic, and a pipeline whose computation can be dynamically configured. The PS design closely subscribes to the system characteristics favored by VLSI. The task of scan conversion for rendering computer graphics images on raster scan displays is very intensive in computation and pixel information access. It is very coherent and suitable, however, for forward difference algorithms. The discrete and regular layout of the raster display, in conjunction with the largely local effect of a pixel on an image, make rendering amenable to parallel architectures with localized memory and communication. These are precisely the attributes favored by VLSI and typical of PS. A modification of the Digital Differential Analyzer (DDA) is implemented to Gouraud Shade and depth buffer convex polygons at high speeds. The scan conversion task is distributed over the processors to efficiently subdivide the image space and maximize concurrency of processor operation. A study of the tradeoffs and architectural choices of the PS reveal the merits and deficits of the PS approach in comparison with Pixel-Planes, SLAMs, Super-Buffers, and SAGE.