Two-level pipelining of systolic array graphics engines

  • Authors:
  • J. A. K. S. Jayasinghe;O. E. Herrmann

  • Affiliations:
  • Twente University, Laboratory for Network Theory, The Netherlands;Twente University, Laboratory for Network Theory, The Netherlands

  • Venue:
  • EGGH'89 Proceedings of the Fourth Eurographics conference on Advances in Computer Graphics Hardware
  • Year:
  • 1989

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Abstract

In a systolic array, the maximum operating speed is determined by the most complex operation performed. In a systolic army graphics engine, capable of generating high quality images, one has to perform complex operations at a very high speed. We propose to use pipelined functional units in systolic army graphics engines as they can perform complex operations at high speeds. Due to time-varying discontinuities of operations performed by systolic army graphics engines, introduction of pipelined functional units is a complex problem. In this paper we present a methodology which solves this problem by a graphtheoretic approach. Furthermore, we characttTize the architectures which can be improved by pipelined functional units.