Linearizability: a correctness condition for concurrent objects
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
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How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
IEEE Transactions on Computers
Foundations of the C++ concurrency memory model
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
A Better x86 Memory Model: x86-TSO
TPHOLs '09 Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics
Reasoning about the implementation of concurrency abstractions on x86-TSO
ECOOP'10 Proceedings of the 24th European conference on Object-oriented programming
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Deciding robustness against total store ordering
ICALP'11 Proceedings of the 38th international conference on Automata, languages and programming - Volume Part II
Stability in weak memory models
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Concurrent library correctness on the TSO memory model
ESOP'12 Proceedings of the 21st European conference on Programming Languages and Systems
Linearizability with ownership transfer
CONCUR'12 Proceedings of the 23rd international conference on Concurrency Theory
Show no weakness: sequentially consistent specifications of TSO libraries
DISC'12 Proceedings of the 26th international conference on Distributed Computing
Show no weakness: sequentially consistent specifications of TSO libraries
DISC'12 Proceedings of the 26th international conference on Distributed Computing
Quarantining weakness: compositional reasoning under relaxed memory models
ESOP'13 Proceedings of the 22nd European conference on Programming Languages and Systems
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Modern programming languages, such as C++ and Java, provide a sequentially consistent (SC) memory model for well-behaved programs that follow a certain synchronisation discipline, e.g., for those that are data-race free (DRF). However, performance-critical libraries often violate the discipline by using low-level hardware primitives, which have a weaker semantics. In such scenarios, it is important for these libraries to protect their otherwise well-behaved clients from the weaker memory model. In this paper, we demonstrate that a variant of linearizability can be used to reason formally about the interoperability between a high-level DRF client and a low-level library written for the Total Store Order (TSO) memory model, which is implemented by x86 processors. Namely, we present a notion of linearizability that relates a concrete library implementation running on TSO to an abstract specification running on an SC machine. A client of this library is said to be DRF if its SC executions calling the abstract library specification do not contain data races. We then show how to compile a DRF client to TSO such that it only exhibits SC behaviours, despite calling into a racy library.