Support Theory for Preconditioning
SIAM Journal on Matrix Analysis and Applications
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SIAM Journal on Matrix Analysis and Applications
Solving Elliptic Finite Element Systems in Near-Linear Time with Support Preconditioners
SIAM Journal on Numerical Analysis
Parallel transistor level circuit simulation using domain decomposition methods
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Electronic Circuit & System Simulation Methods (SRE)
Electronic Circuit & System Simulation Methods (SRE)
A parallel preconditioning strategy for efficient transistor-level circuit simulation
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ACM Transactions on Mathematical Software (TOMS)
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Proceedings of the 47th Design Automation Conference
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To improve the efficiency of direct solution methods in SPICE-accurate nonlinear circuit simulations, preconditioned iterative solution techniques have been widely studied in the past decades. However, it still has been an extremely challenging task to develop general-purpose preconditioning methods that can deal with various large-scale nonlinear circuit simulations. In this work, a novel circuit-oriented, general-purpose support-circuit preconditioning technique (GPSCP) is proposed to significantly improve the matrix solving time and reduce the memory consumption during large-scale non-linear circuit simulations. We show that by decomposing the system Jacobian matrix at a given solution point into a graph Laplacian matrix as well as a matrix including all voltage and controlled sources, and subsequently sparsifying the graph Laplacian matrix based on support graph theory, the general-purpose support-circuit preconditioning matrix can be efficiently obtained, thereby serving as a very effective and efficient preconditioner in solving the original Jacobian matrix through Krylov-subspace iterations. Additionally, a novel critical node selection method and an energy-based spanning-graph scaling method have been proposed to further improve the quality of ultra-sparsifier support graph. To gain higher computational efficiency during transient circuit analysis, a dynamic support-circuit preconditioner updating approach has also been investigated. Our experimental results for a variety of large-scale nonlinear circuit designs show that the proposed technique can achieve up to 14.0X runtime speedups and 6.7X memory reduction in DC and transient simulations.