Domain decomposition: parallel multilevel methods for elliptic partial differential equations
Domain decomposition: parallel multilevel methods for elliptic partial differential equations
Parallel Transient Analysis for Circuit Simulation
HICSS '96 Proceedings of the 29th Hawaii International Conference on System Sciences Volume 1: Software Technology and Architecture
Iterative Methods for Sparse Linear Systems
Iterative Methods for Sparse Linear Systems
Large power grid analysis using domain decomposition
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Parallel domain decomposition for simulation of large-scale power grids
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the 45th annual Design Automation Conference
Final-value ODEs: stable numerical integration and its application to parallel circuit analysis
Proceedings of the 2009 International Conference on Computer-Aided Design
A parallel preconditioning strategy for efficient transistor-level circuit simulation
Proceedings of the 2009 International Conference on Computer-Aided Design
Parallel transistor level full-chip circuit simulation
Proceedings of the Conference on Design, Automation and Test in Europe
Parallel circuit simulation with adaptively controlled projective integration
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Expression-Level Parallelism for Distributed Spice Circuit Simulation
DS-RT '11 Proceedings of the 2011 IEEE/ACM 15th International Symposium on Distributed Simulation and Real Time Applications
Proceedings of the 49th Annual Design Automation Conference
Enabling next-generation parallel circuit simulation with trilinos
Euro-Par'11 Proceedings of the 2011 international conference on Parallel Processing
Proceedings of the International Conference on Computer-Aided Design
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This paper presents an efficient parallel transistor level full-chip circuit simulation tool with SPICE-accuracy. The new approach partitions the circuit into a linear domain and several non-linear domains based on circuit non-linearity and connectivity. The linear domain is solved by parallel fast linear solver while nonlinear domains are parallelly distributed into different processors and solved by direct solver. Parallel domain decomposition technique is used to iteratively solve the different partitions of the circuit and ensure convergence. Different domain decomposition techniques are discussed. Orders of magnitude speedup over SPICE is observed for sets of large-scale VLSI circuits.