Domain decomposition: parallel multilevel methods for elliptic partial differential equations
Domain decomposition: parallel multilevel methods for elliptic partial differential equations
Iterative Methods for Sparse Linear Systems
Iterative Methods for Sparse Linear Systems
Direct Methods for Sparse Linear Systems (Fundamentals of Algorithms 2)
Direct Methods for Sparse Linear Systems (Fundamentals of Algorithms 2)
Parallel domain decomposition for simulation of large-scale power grids
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the 45th annual Design Automation Conference
MAPS: multi-algorithm parallel circuit simulation
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Parallel transistor level circuit simulation using domain decomposition methods
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
PowerRush: efficient transient simulation for power grid analysis
Proceedings of the International Conference on Computer-Aided Design
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In this paper, we present a fully parallel transistor level full-chip circuit simulation tool with SPICE-accuracy for general circuit designs. The proposed overlapping domain decomposition approach partitions the circuit into a linear subdomain and multiple non-linear subdomains based on circuit non-linearity and connectivity. Parallel iterative matrix solver is used to solve the linear domain while non-linear subdomains are parallelly distributed into different processors topologically and solved by direct solver. To achieve maximum parallelism, device model evaluation is done parallelly. Parallel domain decomposition technique is used to iteratively solve the different partitions of the circuit and ensure convergence. Orders of magnitude speedup over SPICE is observed for sets of large-scale circuit designs on up to 64 processors.