Enabling next-generation parallel circuit simulation with trilinos

  • Authors:
  • Chris Baker;Erik Boman;Mike Heroux;Eric Keiter;Siva Rajamanickam;Rich Schiek;Heidi Thornquist

  • Affiliations:
  • Oak Ridge National Laboratory, Oak Ridge, TN;Sandia National Laboratories, Albuquerque, NM;Sandia National Laboratories, Albuquerque, NM;Sandia National Laboratories, Albuquerque, NM;Sandia National Laboratories, Albuquerque, NM;Sandia National Laboratories, Albuquerque, NM;Sandia National Laboratories, Albuquerque, NM

  • Venue:
  • Euro-Par'11 Proceedings of the 2011 international conference on Parallel Processing
  • Year:
  • 2011

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Abstract

The Xyce Parallel Circuit Simulator, which has demonstrated scalable circuit simulation on hundreds of processors, heavily leverages the high-performance scientific libraries provided by Trilinos. With the move towards multi-core CPUs and GPU technology, retaining this scalability on future parallel architectures will be a challenge. This paper will discuss how Trilinos is an enabling technology that will optimize the trade-off between effort and impact for application codes, like Xyce, in their transition to becoming next-generation simulation tools.