Parallel iterative solvers for sparse linear systems in circuit simulation

Authors:
A. Basermann;U. Jaekel;M. Nordhausen;K. Hachiya
Affiliations:
C&C Research Laboratories, NEC Europe Ltd., Rathausallee 10, D-53757 Sankt Augustin, Germany;C&C Research Laboratories, NEC Europe Ltd., Rathausallee 10, D-53757 Sankt Augustin, Germany;C&C Research Laboratories, NEC Europe Ltd., Rathausallee 10, D-53757 Sankt Augustin, Germany;Fundamental Design and Technology Development Group, Design Engineering Division Technology Foundation Dev. Op. Unit, NEC Electronics Corp., Japan
Venue:
Future Generation Computer Systems
Year:
2005

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Abstract

For the solution of sparse linear systems from circuit simulation whose coefficient matrices include a few dense rows and columns, a parallel iterative algorithm with distributed Schur complement preconditioning is presented. The parallel efficiency of the solver is increased by transforming the equation system into a problem without dense rows and columns as well as by exploitation of parallel graph partitioning methods. The costs of local, incomplete LU decompositions are decreased by fill-in reducing reordering methods of the matrix and a threshold strategy for the factorization. The efficiency of the parallel solver is demonstrated with real circuit simulation problems on PC clusters.