Automatic synthesis from UML/MARTE models using channel semantics

Authors:
Pablo Peñil;Héctor Posadas;Alejandro Nicolás;Eugenio Villar
Affiliations:
University of Cantabria, Santander, Spain;University of Cantabria, Santander, Spain;University of Cantabria, Santander, Spain;University of Cantabria, Santander, Spain
Venue:
Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems
Year:
2012

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Abstract

Model-driven design is very common nowadays. In this context, the UML/MARTE profile is a well-known solution for real-time, embedded system modeling. This profile enables the functional and non-functional details of the system to be modeled together. Regarding non-functional details, the profile allows certain real-time constraints to be imposed when describing the system concurrency, in order to ensure predictability. However, these constraints also limit the modeling flexibility required to evaluate different design alternatives when optimizing system performance. The paper proposes a solution for automatically synthesizing the resulting models, combining new communication semantics with standard UML/MARTE real-time management features. The UML/MARTE approach presented in this paper enables concurrency and synchronization effects to be modeled at communication points, making system exploration and implementation easier.