A memory-efficient hardware architecture for real-time feature detection of the SIFT algorithm (abstract only)

Authors:
Wenjuan Deng;Yiqun Zhu
Affiliations:
Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham, United Kingdom;Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham, United Kingdom
Venue:
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Year:
2013

Citing 3
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Abstract

The SIFT (Scale Invariant Feature Transform) is a most popular image processing algorithm that has been widely used in solving image matching related problems. However, SIFT is of high computational complexity and large memory requirement that prevent it from being applied to applications that are unable to offer large on-chip memory. Based on the analysis of the memory requirement of SIFT feature detection, a novel memory access strategy is proposed to reduce the hardware memory usage. In addition, to achieve real-time performance of high resolution video streams, dedicated hardware architecture with multi-pixel based processing scheme has been developed. Compared with conventional designs, our design achieves hardware memory reduction of at least 58.8%.