Hardware/Software co-design of a key point detector on FPGA

Authors:
H. Djakou Chati;F. Muhlbauer;T. Braun;C. Bobda;K. Berns
Affiliations:
Kaiserslautern University of Technology, Germany;Kaiserslautern University of Technology, Germany;Kaiserslautern University of Technology, Germany;Kaiserslautern University of Technology, Germany;Kaiserslautern University of Technology, Germany
Venue:
FCCM '07 Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Year:
2007

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Abstract

The design and implementing of a key point detector on embedded reconfigurable hardware is investigated. The major challenges are efficient hardware/software partitioning of the key point detector algorithm, data flow management as well as efficient use of memory, bus and processor. We present a modular and manual hardware/software co-design, with its implementation on a Xilinx XUP-Virtex II Pro board co-design to solve these issues.