A Hardware Architecture for SIFT Candidate Keypoints Detection
CIARP '09 Proceedings of the 14th Iberoamerican Conference on Pattern Recognition: Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications
Image Compression Using Stitching with Harris Corner Detector and SPIHT Coding
IVIC '09 Proceedings of the 1st International Visual Informatics Conference on Visual Informatics: Bridging Research and Practice
IEEE Transactions on Circuits and Systems for Video Technology
Feature extraction using reconfigurable hardware
ICCVG'10 Proceedings of the 2010 international conference on Computer vision and graphics: Part II
Optical flow reliability model approximated with RBF
IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part II
ACCV'09 Proceedings of the 9th Asian conference on Computer Vision - Volume Part III
A real-time embedded architecture for SIFT
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
FPGA-based module for SURF extraction
Machine Vision and Applications
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This paper proposes a parallel hardware architecture for image feature detection based on the scale invariant feature transform algorithm and applied to the simultaneous localization and mapping problem. The work also proposes specific hardware optimizations considered fundamental to embed such a robotic control system on-a-chip. The proposed architecture is completely stand-alone; it reads the input data directly from a CMOS image sensor and provides the results via a field-programmable gate array coupled to an embedded processor. The results may either be used directly in an on-chip application or accessed through an Ethernet connection. The system is able to detect features up to 30 frames per second (320times240 pixels) and has accuracy similar to a PC-based implementation. The achieved system performance is at least one order of magnitude better than a PC-based solution, a result achieved by investigating the impact of several hardware-orientated optimizations on performance, area and accuracy.