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Communications of the ACM
Granidt: Towards Gigabit Rate Network Intrusion Detection Technology
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Assisting Network Intrusion Detection with Reconfigurable Hardware
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Implementation of a Content-Scanning Module for an Internet Firewall
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Pre-Decoded CAMs for Efficient and High-Speed NIDS Pattern Matching
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Signature Match Processor Architecture for Network Intrusion Detection
FCCM '05 Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
FPGA-based ROM-free network intrusion detection using shift-OR circuit
Journal of Embedded Computing - Design and Optimization for High Performance Embedded Systems
Efficient logic circuit for network intrusion detection
EUC'06 Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing
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Due to increasing number of network worms and virus, network users are vulnerable to malicious attacks. A network intrusion detection system NIDS provides an effective security solution. It monitors network traffic for suspicious data patterns, and informs system administrators to take proper actions. Implementing NIDS in WSNs have unique constraints as compared to traditional networks making the implementation of existing security measures impracticable due to limitation in data memory, code space and energy to power the sensor. In this paper, a novel FPGA-based signature match co-processor structural design is proposed. The computational complexity of our proposed bitmap encoder based NIDS is compared with ROM based NIDS. Experimental results show that the proposed architecture due to the reduction in the hardware leads to an efficient reduction in the size of the sensor nodes, increases the speed of the network and decreases the power consumption of the WSN.