Patterns in property specifications for finite-state verification
Proceedings of the 21st international conference on Software engineering
Model checking
Model-Based Testing of Reactive Systems: Advanced Lectures (Lecture Notes in Computer Science)
Model-Based Testing of Reactive Systems: Advanced Lectures (Lecture Notes in Computer Science)
The DaCapo benchmarks: java benchmarking development and analysis
Proceedings of the 21st annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications
A resource optimized Processor Core for FPGA based SoCs
DSD '07 Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools
A New Methodology for the Test of SoCs and for Analyzing Elusive Failures
MTV '08 Proceedings of the 2008 Ninth International Workshop on Microprocessor Test and Verification
On-Chip Instrumentation: Design and Debug for Systems on Chip
On-Chip Instrumentation: Design and Debug for Systems on Chip
The theory and practice of SALT
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Runtime Verification for LTL and TLTL
ACM Transactions on Software Engineering and Methodology (TOSEM)
TRACECONTRACT: a scala DSL for trace analysis
FM'11 Proceedings of the 17th international conference on Formal methods
SALT—structured assertion language for temporal logic
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
Java-MOP: a monitoring oriented programming environment for java
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
JavaMOP: efficient parametric runtime monitoring framework
Proceedings of the 34th International Conference on Software Engineering
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Multicore System-on-Chip (SoC) implementations of embedded systems are becoming very popular. In these systems it is possible to spread out computations over many cores. On one hand this leads to better energy efficiency if clock frequencies and core voltages are reduced. On the other hand this delivers very high performance to the software developer and thus enables complex software systems to be implemented. Unfortunately, debugging and validation of these systems becomes extremely difficult. Various technological approaches try to solve this dilemma. In this contribution we will show a new approach to observe multi-core SoCs and make their internal operations visible to external analysis tools. Also, we show that runtime verification can be employed to analyze and validate these internal operations while the system operates in its normal environment. The combination of these two approaches delivers unprecedented options to the developer to understand and verify system behavior even in complex multicore SoCs.