A multi-core memory organization for 3-d DRAM as main memory

Authors:
Jared Sherman;Krishna Kavi;Brandon Potter;Mike Ignatowski
Affiliations:
University of North Texas, Denton, Texas;University of North Texas, Denton, Texas;University of North Texas, Denton, Texas;Advanced Micro Devices, Austin, Texas
Venue:
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
Year:
2013

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Abstract

There is a growing interest in using 3-D DRAM structures and non-volatile memories such as Phase Change Memories (PCM) to both improve access latencies and reduce energy consumption in multicore systems. These new memory technologies present both opportunities and challenges to computer systems design. In this paper we address how such memories should be organized to fully benefit from these technologies. We propose to keep 3-D DRAMs as main memory systems, but use non-volatile memories as backing store. In this connection, we view DRAM based main-memory both as a cache memory and as main memory. The cache like addressing allows for fast address translation and better memory allocation among multiple processes. We explore a set of wide-ranging design parameters for page sizes, sub-page sizes, TLB sizes, and sizes of write-buffers.