An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
Journal of Electronic Testing: Theory and Applications
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes
DFT '02 Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
MEFISTO-L: A VHDL-Based Fault Injection Tool for the Experimental Assessment of Fault Tolerance
FTCS '98 Proceedings of the The Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing
Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Fault Injection Techniques and Tools for Embedded Systems
Fault Injection Techniques and Tools for Embedded Systems
Memories: A Survey of Their Secure Uses in Smart Cards
SISW '03 Proceedings of the Second IEEE International Security in Storage Workshop
Improvement of fault injection techniques based on VHDL code modification
HLDVT '05 Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International
Early Analysis of Fault-based Attack Effects in Secure Circuits
IEEE Transactions on Computers
Enhancement of fault injection techniques based on the modification of VHDL code
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs
DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Fault-based attack of RSA authentication
Proceedings of the Conference on Design, Automation and Test in Europe
Automated Power Characterization for Run-Time Power Emulation of SoC Designs
DSD '10 Proceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
Modular Fault Injector for Multiple Fault Dependability and Security Evaluations
DSD '11 Proceedings of the 2011 14th Euromicro Conference on Digital System Design
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The increasing level of integration and decreasing size of circuit elements leads to higher probabilities of operational faults. More vulnerable electronic devices are also more prone to external influence from energizing radiation. Additionally, the concerns of chip designers include not only the natural causes of faults but also the misbehavior of chips due to ''planned'' attacks, as, for example, in critical security applications. In particular, smart cards are exposed to complex attacks through which an adversary attempts to extract knowledge from secured systems by provoking undefined states. These problems increase the need to test new designs for their fault robustness. This paper presents a case study on fault injection strategies. An in-system fault injection strategy for automatic test pattern injection by enabling the emulation of fault effects on the circuit level is introduced. Second, an approach is presented that provides an abstraction of the internal fault injection structures to a more generic high-level view. Through this abstraction, it is possible to help the operating system designer test a product against different fault effects without knowing how to produce this effect by a fault attack. Therefore, we implemented a modular fault injection controller that is located along with the system under test on the emulator platform.