Vector prefetching

Authors:
Michael K. Gschwind;Thomas J. Pietsch
Affiliations:
Institut for Technische Informatik, Technische Universität Wien, TreitlstraBe l-182-2, A-1040 Wien, Austria;Tandem Computer GesmbH., Handelskai 388/4/6/2, A-1020 Wien, Austria
Venue:
ACM SIGARCH Computer Architecture News
Year:
1995

Citing 7
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Abstract

This paper focuses on extending the memory subsystem by integrating a prefetch buffer mechanism. Prefetching allows high-level application knowledge to increase memory performance, which is currently constraining the performance of most system. While prefetching does not reduce the latency of memory accesses, it hides this latency by overlapping memory access and instruction execution. The first prefetch operation to the buffer is initiated by an explicit fetch instruction. All further prefetch operations are issued automatically whenever a prefetched value is consumed. To efficiently support list and vector processing, the user can specify a stride value at the time the first prefetch operation is initiated.